181 |
489 |
MDX: UVR-MDX-NET Inst HQ1 | Batch Mode |
? |
- |
10.7298 |
9.9924 |
182 |
455 |
Embemble v1 |
? |
+ |
10.5396 |
9.9910 |
183 |
145 |
Demucs: v4 | htdemucs_ft - Shifts: 10 - Overlap: 0.25 (default) |
? |
- |
10.2842 |
9.9877 |
184 |
172 |
Demucs: v4 | htdemucs_ft - Shifts: 1 - Overlap: 0.75 |
? |
- |
10.2654 |
9.9690 |
185 |
144 |
Demucs: v4 | htdemucs_ft - Shifts: 5 - Overlap: 0.25 (default) |
? |
- |
10.2542 |
9.9578 |
186 |
5073 |
Ensemble | UVR5 | MDX23C-InstVoc HQ + MDX23C_D1581 + hdemucs_mmi + UVR-MDX-NET-Voc_FT | Max/Min Spec |
? |
+ |
10.6204 |
9.9494 |
187 |
58 |
Demucs4 HT |
? |
- |
10.2397 |
9.9435 |
188 |
120 |
VR Arc: MGM_HIGHEND_v4 + UVR-MDX_Net_Main_427 - Ensemble Algorithm: Average/Average |
? |
+ |
10.1532 |
9.9412 |
189 |
232 |
UVR_MDXNET_9482 |
? |
- |
10.3686 |
9.9336 |
190 |
150 |
Demucs: v4 | htdemucs_ft - Shifts: 2 - Overlap: 0.25 (default) |
? |
- |
10.2262 |
9.9298 |
191 |
171 |
Demucs: v4 | htdemucs_ft - Shifts: 1 - Overlap: 0.5 |
? |
- |
10.2238 |
9.9274 |
192 |
449 |
UVR-MDX-NET-Inst_1 - UVR-MDX-NET-Inst_2 - UVR-MDX-NET-Inst_3 - Kim_Vocal_1 - Ensemble Algorithm: Max Spec/Min Spec |
? |
+ |
10.7592 |
9.9267 |
193 |
48 |
htdemucs_ft |
? |
- |
10.2008 |
9.9043 |
194 |
142 |
Demucs: v4 | htdemucs_ft - Shifts: 1 - Overlap: 0.25 (default) |
? |
- |
10.1935 |
9.8971 |
195 |
86 |
UVR-MDX-NET Inst 3 (75% speed) + htdemucs_ft |
? |
+ |
10.1399 |
9.8927 |
196 |
89 |
UVR-MDX-NET_Inst_82_beta |
? |
- |
10.3290 |
9.8893 |
197 |
147 |
Demucs: v4 | htdemucs_ft - Shifts: 1 - Overlap: 0.25 (default) - attempt 2 |
? |
- |
10.1708 |
9.8744 |
198 |
88 |
UVR-MDX-NET_Inst_90_beta |
? |
- |
10.4135 |
9.8735 |
199 |
127 |
UVR-MDX-NET 427 + Demucs V4 (htdemucs_6s) - Ensemble: Max Spec/Min Spec |
? |
+ |
10.1527 |
9.8565 |
200 |
146 |
UVR-MDX-NET_2_9.682 |
? |
- |
10.3663 |
9.8511 |